Evaluation of Coefficient of Thermal Expansion for COB Packaging Substrates

This article provides a comprehensive technical guide to the evaluation of the Coefficient of Thermal Expansion (CTE) for COB (Chip on Board) packaging substrates. Understanding and controlling the in-plane CTE is critical for ensuring the structural integrity and long-term reliability of high-density electronic assemblies.

Technical Overview

In the field of microelectronics packaging, Chip on Board (COB) technology demands precise thermal management to prevent mechanical failure. The Coefficient of Thermal Expansion (CTE) is a fundamental physical property that quantifies the rate at which a material expands or contracts with changes in temperature. For COB substrates, a mismatch in the CTE between the semiconductor chip (typically silicon) and the substrate material can induce significant thermal stress during manufacturing processes and operational life cycles. This stress often leads to interfacial delamination, solder joint cracking, or die fracture, making the accurate evaluation of the substrate's in-plane CTE an essential step in the design and qualification process.

Testing Samples

To ensure a robust evaluation, various substrate materials intended for COB applications are selected for testing. The sample selection typically covers a broad range of materials to validate their suitability for different operational environments.

Ceramic Substrates

Ceramic materials such as Alumina (Al2O3) and Aluminum Nitride (AlN) are widely used due to their excellent thermal conductivity and low CTE values, which closely match that of silicon chips. These samples are often tested to verify consistency across different production lots.

Organic Substrates

Organic substrates, including BT (Bismaleimide Triazine) resin, FR-4, and high-frequency materials like PTFE, are popular for their cost-effectiveness and ease of processing. However, they typically exhibit higher CTE values, requiring careful evaluation of glass transition temperatures (Tg) and dimensional stability.

Testing Items

The evaluation process focuses on specific thermal and dimensional parameters that define the material's behavior under thermal load. The primary testing items include:

• In-plane Coefficient of Thermal Expansion (CTE) measurement.
• Glass Transition Temperature (Tg) determination for organic substrates.
• Linear expansion curves across the operational temperature range.
• Repeatability analysis under thermal cycling conditions.

Testing Methods

Thermomechanical Analysis (TMA)

The industry-standard method for determining the CTE of substrate materials is Thermomechanical Analysis (TMA). This technique measures the dimensional change of a sample as a function of temperature. The sample is placed in a temperature-controlled furnace, and a probe measures the expansion or contraction with high sensitivity.

For COB substrates, the evaluation is typically performed in an inert nitrogen atmosphere to prevent oxidation. The temperature is ramped at a controlled rate, usually between 5°C and 10°C per minute, covering a range relevant to the device's application (e.g., -55°C to 250°C). The resulting data plot of dimensional change versus temperature allows engineers to calculate the mean CTE values and identify inflection points indicating phase transitions.

Applications

The data obtained from CTE evaluation is critical for several key areas in electronics manufacturing and reliability engineering.

• Material Selection: Engineers use CTE data to select substrates that minimize CTE mismatch with the die, thereby reducing thermal stress.
• Reliability Prediction: Finite Element Analysis (FEA) simulations rely on accurate CTE inputs to predict solder joint fatigue life and warpage behavior.
• Quality Control: Regular CTE testing ensures that raw materials meet specifications and that manufacturing processes do not alter material properties.

FAQ

Why is the in-plane CTE more important than the out-of-plane CTE for COB applications?

In COB packages, the primary failure mechanisms, such as solder joint fatigue and die cracking, are driven by the shear stress generated at the interface between the die and the substrate. This stress is directly caused by the difference in expansion in the X and Y directions (in-plane). While the out-of-plane CTE affects overall warpage, the in-plane CTE is the dominant factor for interfacial reliability.

What is the ideal CTE value for a COB substrate?

The ideal CTE value is one that closely matches the semiconductor material. For silicon chips, the CTE is approximately 2.6 ppm/°C. Therefore, a substrate with a CTE near this value, such as aluminum nitride (approx. 4.5 ppm/°C) or specialized low-CTE organic composites, is preferred to minimize stress and enhance product longevity.